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Enable GPIO Pin Interrupts #1922
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labbott
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build/lpc55pins/src/lib.rs
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writeln!(&mut buf, "#[allow(unused)]")?; | ||
writeln!( | ||
&mut buf, | ||
"pub const {}_PINT_MASK: u32 = 1 << {};", |
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Passing the raw mask around doesn't seem right and you have a comment below about wanting to validate the mask. Can we pass the PintSlot
enum around instead? That should always be valid.
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Add interrupt-related API calls to the LPC55 `gpio_driver`. A task on an LPC55 can now configue and use GPIO interrupts. app.toml example shows Pin Interrupt configuration: [tasks.foo] ... interrupts = { "pint.irq0" = "button-irq" } ... task-slots = ["gpio_driver", ...] [tasks.foo.config] pins = [ { name="BUTTON', pin={ port=1, pin=9}, alt=0, pint=0, direction="input", opendrain="normal" } ]
…API. The functions: fn {clear,detected,disable,enable}_{rising,falling,status}(PintSlot) and fn read_pint_status(...) become fn pint_op(PintSlot, PintOp, PintCondition) This leaves a couple permutations not covered (enable/disable interrupt at the NVIC level). Those can are left as no-ops for the time being. Future: The unimplemented combinations could return an error/fault if called.
…EADME.md Feedback response: Fix idl/lpc55-pins.idol to use Option<PintSlot>. Feedback response: Collapse the many PINT calls in lpc55-pins.idol to one `pint_op`
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Add interrupt-related API calls to the LPC55
gpio_driver
.Also:
Fix app/gimletlet/app-mgmt.toml stack size which was found while building all targets.
A task on an LPC55 can now configue and use GPIO interrupts.
app.toml example shows Pin Interrupt configuration:
[tasks.foo]
...
interrupts = { "pint.irq0" = "button-irq" }
...
task-slots = ["gpio_driver", ...]
[tasks.foo.config]
pins = [
{ name="BUTTON', pin={ port=1, pin=9}, alt=0, pint=0, direction="input", opendrain="normal" }
]